1. Field of the Invention
The invention relates to a comparator circuit with a differential amplifier. In analog integrated circuits, comparators are often used to compare two voltages to one another. The outcome of the comparison is indicated at the output of the comparator by a certain switching state. A comparator typically includes a differential amplifier, which on the output side triggers a transistor disposed downstream of the comparator. Depending on the input signal, the output of the differential amplifier turns the downstream transistor either on or off. Comparator circuits of this generic type are known, for instance from European Patent 0 442 001 B1 and from U.S. Pat. No. 4,529,891. The European Patent 0 442 001 B1 is discussed in more detail below in regards to FIG. 1.
Comparator circuits are typically used in integrated sawtooth generators. To that end, a circuit is chosen that charges and discharges an external capacitor via a reversible constant current. If the capacitor voltage overshoots or undershoots an internally generated maximum reference voltage, a comparator switches over to a discharging or charging current, as a result of which the external capacitor is discharged or charged, respectively. An integrated sawtooth generator typically has a clock frequency of 100 KHz at a frequency error of .+-.5% and a typical duty cycle of t.sub.r /T=86%.
A unique problem associated with such an integrated circuit is the need for a very low frequency error of .+-.5% at a presumed ideal external capacitance. The accuracy of the sawtooth generator is determined essentially by the voltage and current sources and by the properties of the comparator. The offset voltage of the comparator, given sufficient common-mode suppression, is of equal magnitude at both switching thresholds, and any frequency error that occurs is compensated for. Any deviation in the clock transit time, however, is fully expressed in the resultant frequency error. In this way, "overshooting" of the ideal switching thresholds reduces the clock frequency. The greater the duty cycle, the more strongly the comparator behavior is expressed in a change of frequency.
In general, high switching speeds can be attained with bipolar differential amplifiers. In smart power technology (SMT), however, only very slow bipolar transistors that have poor current amplification properties are available. Yet in smart power technology the input structures must be triggered with as little loss as possible, i.e. with the highest possible impedance. MOS level converters that may be connected upstream of the differential amplifier have proven to be disadvantageous. As a result of parasitic capacitances, MOS level converters have lengthened switching times and increased current consumption due to the high bias current required. To supply the requisite high impedance at the inputs, field-effect-controlled components, such as MOSFETs, IGBTs, etc. are used as input transistors for the differential amplifier.